Quadrature Clock Generator Introduction


This stage divides the local oscillator output by 4 and shifts the phase of the dividend signals such that they are now one-fourth the LO frequency and 90 degrees separated in phase (i.e., in quadrature). Both signals are identical in all regards except phase. They will be used to clock the switch used in the Quadrature Sampling Detector (QSD) stage.

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Quadrature Clock Generator Schematic

(Resistor testpoints (hairpin, top, or left-hand lead), as physically installed on the board, are marked in the schematic with red dots)

(Click for Full Schematic)
Quadrature Clock Generatorschematic

(above schematic has clickable areas that can be used for navigation)

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Quadrature Clock Generator Bill of Materials

Stage Bill of Materials

(resistor images and color codes courtesy of WIlfried, DL5SWB's R-Color Code program)

210 k 1/6W 5%brn-blk-ora-gld brn-blk-ora-gld1/6W
10.1 uF(smt) black stripe (smt) black stripeSMT 1206
174AC74 Dual D FF74AC74 74AC74SOIC-14

Quadrature Clock Generator Summary Build Notes

Quadrature Clock Generator Detailed Build Notes

Bottom of the Board

Quadrature Clock Generator Bottom View

Install IC and SMT Capacitor

U0674AC74 Dual D FF74AC74 74AC74SOIC-14
Take ESD precautions
Markings vary - look for "AC74"
C360.1 uF(smt) black stripe (smt) black stripeSMT 1206yellow pads

Top of the Board

Quadrature Clock Generator Top View

Install Voltage Divider Resistors

Pay careful attention to the orientation (S-N and N-S, respectively) of R10 and R11. Some builders have inadvertently installed these with a horizontal orientation rather than a vertical orientation.

R1010 k 1/6W 5%brn-blk-ora-gld brn-blk-ora-gld1/6WS-N
R1110 k 1/6W 5%brn-blk-ora-gld brn-blk-ora-gld1/6WN-S

Quadrature Clock Generator Completed Stage

Top of the Board

View of Completed Top

Bottom of the Board

View of Completed Bottom

Quadrature Clock Generator Testing

Current Draw

Test Setup

With both the USB cable and the power cable plugged in, measure the current draw in the positive power lead.

Measure the current draw with just the 12V power.

Test Measurements

TestpointUnitsNominal ValueAuthor'sYours
Current draw WITH USBmA< 189.8_______
Current draw NO USBmA< 2013.7_______

Test Voltage Divider

Test Setup

When performing the following tests, you must apply [pwer to the board AND plug in the USB cable. Otherwise, results will not be as expected.

Plug in USB and power the board.

Measure the voltage on the R11 hairpin; you should see 50% of the %v rail voltage.

Test Measurements

TestpointUnitsNominal ValueAuthor'sYours
R11 hairpin (WRT regular gnd)V dc2.52.46_______

Divider Pin Voltages

Test Setup

Power USB and 12V. Then measure the voltages on the pins (and, separately, on the pads) of U6 (74AC74). Refer to the color codes on the graphic for the voltages.

Pins 3 and 11 will not show exactly 2.5Vdc because they have the additional AC component of the local oscillator signal from C3.

Divider Pin Voltages

Test Measurements

TestpointUnitsNominal ValueAuthor'sYours
Pin 1Vdc54.92_______
Pin 2Vdc2.52.45_______
Pin 3Vdc2 to 32.46_______
Pin 4Vdc54.92_______
Pin 5Vdc2.52.45_______
Pin 6Vdc2.52.45_______
Pin 7Vdc0 (GND)0_______
Pin 8Vdc2.52.45_______
Pin 9Vdc2.52.45_______
Pin 10Vdc54.92_______
Pin 11Vdc2.52.46_______
Pin 12Vdc2 - 32.45_______
Pin 13Vdc54.92_______
Pin 14Vdc54.92_______

Quadrature Colck Generated Waveforms

Test Setup

Set your board up to oscillate at a selected center frequency, e.g., 7.100 MHz.

If you have a dual trace scope available, probe the two "QSD CLK (n)" test points and you should get a waveform similar to the one shown here.

Your mileage may vary, depending upon the desired center frequency you select and the quality of your scope (some scopes tend to have issues with these square waves - still, the scope should show two waveforms in quadrature at the desired center frequency).

Quadrature Colck Generated Waveforms
Local Oscillator's Output 2,5V test point Quadrature Clock Signals for Clocking the QSD ("mixer")